National Repository of Grey Literature 51 records found  1 - 10nextend  jump to record: Search took 0.01 seconds. 
Measurement parameters of communication via PCI Express
Dujiček, Ondřej ; Dvořák, Vojtěch (referee) ; Pristach, Marián (advisor)
This bachelor thesis deals with parameters affecting throughput of PCI Express bus and its main result is a design and implementation of a unit for measuring parameters of communication over PCI Express bus. The unit is implemented in VHDL language and its support on generating and measuring traffic at speeds up to 100 Gbps. Unit’s operation frequency, when implemented in Virtex 7 available at COMBO-100G , is 200 MHz. The implemented unit is controlled from software through MI32 interface and it is able to measure the amount of transferred packets and data in both receive and transmit directions. This information can be exported into software using MI32 interface.
Simulation of cryptographic algorithms using FPGA
Németh, František ; Mašek, Jan (referee) ; Smékal, David (advisor)
Bachelor thesis is dealing with a cipher standard AES and with a design of encryption and decryption components for AES in special modes of operation. Programming language is VHDL. In theoretical part of thesis is a further descriptions of AES and behaviour of block cipher operation modes. Furthermore the brief description of VHDL, FPGA and NetCOPE framework is a piece of theoretical part as well. The practical part contains designs which are made in developing environment Vivado from Xilinx. Programmed modes of operation are ECB, CBC, CTR and CFB. Simulation outputs and synthesis results are summerized in tables.
Implementation of cryptographic algorithms on the FPGA platform
Zugárek, Adam ; Sládok, Ondřej (referee) ; Smékal, David (advisor)
This bachelor’s thesis describes methods of data encryption and author’s own implementation on FPGA. The goal of this thesis is to implement cipher on a hardware accelerated network card COMBO. In the introduction is described encryption using block ciphers. Cipher AES was chosen to implement, which is famous and most using cipher. Its detailed description is described in the first part of the thesis. In the second part is described the author’s own implementation of AES cipher in VHDL. In the next part is method of interconnecting the resulting program with a framework of the FPGA card – NetCOPE. Achieved results are in the end of this thesis. The resulting program cannot encrypt network communication. It only transforms data stored in the card, which then send to host computer.
Packet Transmission at 100 Gb/s Ethernet
Hummel, Václav ; Dvořák, Milan (referee) ; Matoušek, Jiří (advisor)
The NetCOPE platform is used for rapid developement of hardware accelerated network applications on the family of COMBO cards. An essential part of this platform is output network module which helps designers to implement Data Link Layer of the OSI reference model, especially the MAC sublayer. This bachelor’s thesis focuses on design, implemen- tation and verification of such a module operating at speed 100 Gb/s. Furthemore, an appli- cation on the NetCOPE platform was created. It is designed for transmitting short samples of network traffic stored in QDR static memory. Transmission is controlled by precise ti- mestamps. The whole system was deployed on a COMBO card and verified by a network traffic analyzer.
I/O Virtualization in Networking
Perešíni, Martin ; Kekely, Lukáš (referee) ; Martínek, Tomáš (advisor)
Existuje veľa rôznych dôvodov pre spoločnosti a organizácie, prečo by mali investovať do virtualizácie. Asi najväčší dôvod je finančná motivácia, pretože nasadenie virtualizácie môže ušetriť nemálo peňazí. Táto práca sa zaoberá práve problémom virtualizácie I/O operácií v sieťovom prostredí. Cieľom práce je tvorba softvérových ovládačov pre I/O virtualizáciu, ktoré by mohli pracovať s hardvérovo akcelerovanými sieťovými kartami. Hlavným prínosom ovládačov by mala byť použiteľnosť a čo najmenšia strata prenosového výkonu vo virtualizovanom prostredí. Pred popisom finálnych detailov ovládačov je však potrebné uviesť potrebné teoretické základy. Teoretická časť sa zaoberá súčasnými trendami vo virtualizácii I/O, technológiami ako sú virtio, vhost, SR-IOV, VFIO a mdev. V praktickej časti sú navrhuté dva spôsoby riešenia problému. Prvým je použitie technológie virtio (emulácia softvéru). Druhé je založené na technológii VFIO-mdev (hybridná paravirtualizácia). Pokiaľ sa jedná o výkon a konfigurovateľnosť zariadení, oba prístupy majú rôzne benefity. Tieto riešenia majú aj svoje nevýhody, ako je zložitosť riešenia a náročnosť integrácie do systému. Požadované ciele boli úspešne dosiahnuté vo forme prototypu ovládača nfb_mdev.
Graphical User Interface for Packet Generator
Chromčák, Michal ; Kováčik, Michal (referee) ; Matoušek, Jiří (advisor)
According to increasing requirements on speed of different software and hardware components, there are solutions, which can, by principle,  reach better parameters, then solutions commonly known. One of them is to use software with hardware acceleration on the field of generating synthetic network traffic. Exactly this way a packet generator was implemented, in current version without graphical user interface. But to let this system spread into the target group of users, there is need to implement also this interface. This bachelor's thesis describes proposal of graphical interface, its implementation in JavaFX programming language, testing on real users and tutorial demonstrating how to use this interface.
Adapting the NetCOPE Platform for the NetFPGA Card
Koranda, Karel ; Puš, Viktor (referee) ; Korček, Pavol (advisor)
This thesis deals with adapting the NetCOPE platform for rapid development of hardware-accelerated network aplications for the NetFPGA-10G card. Its general purpose is to introduce target technology of FPGA chips and describe differences between the families of COMBOv2 and NetFPGA cards. The goals of this thesis are to design, implement and document the necessary adjustments of the NetCOPE platform, as well as testing of target hardware device with already ported platform and evaluation of options for inserting the core application.
Generating of flood attacks
Hudec, David ; Hajný, Jan (referee) ; Smékal, David (advisor)
The assessment comprises of two parts, describing theory and generating of flood attacks respectively. The first part covers flood attacks' analysis, deals with their available techniques and practices, known in the area, and a computer simulation program, revealing the behavior of a contested network as well as the attacker's procedure. In the following part, data generating solutions itself are described. These are represented by two hardware programs, adapted from existing solutions, and one C# application, created by the author. The comparison of these two approaches is included, as well as are the generation results and mitigation proposal.
Network Applications Acceleration
Štourač, Jan ; Korček, Pavol (referee) ; Puš, Viktor (advisor)
There has been developed family of cards called COMBO under the auspices of the CESNET association. These cards carry programmable field array and their purpose is intended into accelerating of net traffic. There is also a platform called NetCOPE which is based on these cards and it's purpose is to accelerate and simplify the development of network applications. This thesis contains a detailed analysis of data throughput through a whole platform and describes some possible improvements which should reflect in a better performance of the whole platform.
Virtualization of I/O Operations in Computer Networks
Remeš, Jan ; Martínek, Tomáš (referee) ; Matoušek, Denis (advisor)
This work deals with virtualization of computer systems and network cards in high-speed computer networks, and describes implementation of the SR-IOV virtualization technology support in the COMBO network card platform. Various approaches towards network card virtualization are compared, and the benefits of the SR-IOV technology for high performance applications are described. The work gives overview of the COMBO platform and describes design and implementation of the SR-IOV technology support for the COMBO platform. The work concludes with measurement and analysis of the implemented technology performance in virtual machines. The result of this work is the COMBO cards' support for the SR-IOV technology, which makes it possible to use them in virtual machines with wire-speed performance preserved. This allows future COMBO cards to be used as accelerators in the networks utilizing the Network Function Virtualization.

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